Agilent J-BERT N4903BHigh-Performance Serial BERT 7 Gb/s and 12.5 Gb/sData Sheet Version 1.4 (USB 3.1 SKP OS filtering)Complete jitter tolerance test
Specifications-Pattern GeneratorData output and auxiliary data output (DATA OUT, AUX DATA OUT)Table 2. Output characteristics for J-BERT N4903B generat
11Pattern Generator SpecificationsClock output (CLK OUT)Clock can operate at full bit-rate or at half bit-rate (Option 003) to support testing of forwa
12Error add input (ERROR ADD)The external error add input adds a single error to the data output for each rising edge at the input. When electrical id
13Library of pre-defined patternsMany popular compliance patterns are predefined, such as: CJTPAT, CJPAT, DisplayPort, FDDI, Fibre Channel, K28.5, PCI
14Sine waveFor all data ratesFor data rates ≥ 8.1 Gb/sData rate (Gb/s)12.5 Gb/s2.5 Gb/s2.75 UI2.2 UI1.1 UI0.55 UI5.0 Gb/s10 Gb/sData rate x 220 ps3000
15Sinusoidal jitter (Option J10)This injects sinusoidal jitter in the lower frequency range with multiple UIs. Table 13. Specifications for sinusoida
16Bounded uncorrelated jitter (Option J10)This injects a high probability jitter using a PRBS generator and low-pass filters. Table 15. Specifications
17Jitter Tolerance Test SpecificationsFigure 23. Interference channel connectorsFigure 24. Typical S21 parameter for ISI channel of 9 inch lengthTable
18Error Detector SpecificationsData inputs (DATA IN)Table 20. Specifications for error detectorRange of operation 150 Mb/s to 12.5 Gb/s (Option C13)150
19Table 23. Specifications for tunable loop bandwidthTunable loop bandwidth500 kHz to 12 MHz for data rates 1.46 Gb/s to 12.5 Gb/s 100 kHz to 4 MHz for
Agilent Technologies N4900 SeriesAgilent offers a wide range of serial bit error ratio test (BERT) solutions for R&D and manufacturing. The J-BERT
20Error Detector SpecificationsTrigger output (TRIG OUT)Pattern trigger modeThis provides a trigger synchronized with the selected error detector refer
21Auxiliary output (AUX OUT)This output can be used to provide either clock or data signals:Clock: clock signals from the input or the recovered clock
22Mainframe CharacteristicsFigure 30. Rear panel viewTable 29. General mainframe characteristicsOperating temperature 5 ºC to 40 ºC (-23 to +104 ºF)St
23Ordering InstructionsJ-BERT N4903B high-performance serial BERTIncludes six 50-Ω SMA terminations, ten adapters 3.5 mm female to 2.4 mm male, ESD pr
24AccessoriesTable 32. Recommended accessoriesRecommended accessories Description Model numberCables, adaptersPower divider 2.4 mm 11636CShort matched
25Title Publication numberApplication Notes:How to test MIPI M-PHY high-speed receivers Application Note5991-2848ENHow to pass Receiver Test according
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3Figure 1. J-BERT is the highest-performance BERT amongst Agilent‘s offering of serial BERT solutions for R&D and manufacturingJ-BERT M8020AThe J-
4 J-BERT N4903B High-Performance Serial BERTThe J-BERT N4903B high-performance serial BERT provides the most complete jitter tolerance test for embedd
5J-BERT N4903B The Most Complete Jitter Tolerance Test SolutionKey capabilities of J-BERT N4903B• Data rate range from 150 to 7 or 12.5 or 14.2 Gb/s•
6Calibrated and integrated jitter injection• Periodic jitter, single and dual-tone (Option J10)• Sinusoidal jitter (Option J10)• Random jitter and
7User Interface and Measurement SuiteQuick eye diagram and maskingThe quick eye diagram allows a one-shot check for a valid signal. Due to the higher
8User InterfaceBit recovery mode (Option A01)This mode is useful for analyzing non-deterministic traffic. This is helpful when you need to analyze rea
9Figure 14. Pattern generator setup screen with graphical display of signal levels and data-to-clock delaySpecifications-Pattern GeneratorFigure 13. Ge
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