Agilent Technologies 16750A User Manual

Agilent Technologies 16750A/B Logic Analyzer Help Volume© 1992-2002 Agilent Technologies. All rights reserved.

10 Contents4 ConceptsUnderstanding Logic Analyzer Triggering 192The Conveyor Belt Analogy 192Summary of Triggering Capabilities 194Sequence Levels 19

100Chapter 2: Task GuideUsing SymbolsPattern.• Use the Find Symbols of Type selections to filter the symbols by type.4. Select the symbol you want to

101Chapter 2: Task GuideUsing SymbolsTo create a readers.ini file You can change how an ELF/Stabs, Ticoff or Coff/Stabs symbol file is processed by cr

102Chapter 2: Task GuideUsing Symbolssection will be read completely. This can occur if the file was created without a "generate debugger informa

103Chapter 2: Task GuideUsing Symbols C MaxSymbolWidth=60 StabsType=2Example for Coff/Stabs (using Ticoff reader) [ReadersTicoff] C C MaxSymbolWidth=6

104Chapter 2: Task GuidePrinting/Exporting Captured DataPrinting/Exporting Captured DataTo print captured dataYou can print captured data from display

105Chapter 2: Task GuidePrinting/Exporting Captured Data5. Select the file name and automatic file sequencing options.6. Select the Read File button.7

106Chapter 2: Task GuideCross-TriggeringCross-TriggeringAn instrument must be armed before it can look for a trigger. By default, instruments are set

107Chapter 2: Task GuideCross-Triggering2. Run the measurement.To cross-trigger with another instrument1. Select the Intermodule button (or from the W

108Chapter 2: Task GuideSolving Logic Analysis ProblemsSolving Logic Analysis Problems• “To test the logic analyzer hardware” on page 108 See Also • “

109Chapter 2: Task GuideSolving Logic Analysis ProblemsIf any test fails, contact your local Agilent Technologies Sales Office or Service Center for a

111Getting StartedAfter you have connected the logic analyzer probes to your device under test (see “Step 1. Connect the logic analyzer to the device

110Chapter 2: Task GuideSaving and Loading Logic Analyzer ConfigurationsSaving and Loading Logic Analyzer ConfigurationsThe Agilent Technologies 16750

111Chapter 2: Task GuideSaving and Loading Logic Analyzer ConfigurationsNOTE: The Agilent Technologies 16700A/B logic analysis systems can translate c

112Chapter 2: Task GuideSaving and Loading Logic Analyzer Configurations

1133Reference• “The Sampling Tab” on page 115• “The Format Tab” on page 119• “The Trigger Tab” on page 146

114Chapter 3: Reference• “The Symbols Tab” on page 159• “Error Messages” on page 170• “Specifications and Characteristics” on page 186

115Chapter 3: ReferenceThe Sampling TabThe Sampling TabThe Sampling tab lets you choose between the logic analyzer's asynchronous sampling Timing

116Chapter 3: ReferenceThe Sampling TabTiming ModeWhen you select Timing Mode, the Timing Mode Controls area appears.Full/Half Channel Configuration L

117Chapter 3: ReferenceThe Sampling TabState ModeWhen you select State Mode, the State Mode Controls area appears.200 MHz/400 MHz State Speed Configur

118Chapter 3: ReferenceThe Sampling Tabunder test) that will enable (qualify) the sampling clock.Generally, the state mode sampling clock is taken fro

119Chapter 3: ReferenceThe Format TabThe Format TabThe Format tab lets you assign bus and signal names (from the device under test), to logic analyzer

12Chapter 1: Getting Started• “Step 2. Choose the sampling mode” on page 14• “Step 3. Format labels for the probed signals” on page 17• “Step 4. Defin

120Chapter 3: ReferenceThe Format Tabclock bits span more than one pod pair.See Also “Formatting Labels for Logic Analyzer Probes” on page 57“To manua

121Chapter 3: ReferenceImporting Netlist and ASCII FilesImporting Netlist and ASCII FilesNetlist FilesThe Netlist Import feature provides a method for

122Chapter 3: ReferenceImporting Netlist and ASCII FilesFor ExampleLabel1;A2[15:5];A1[5,2]Label1 Bus Name A2 and A1 Pod Numbers [15:5] Channel 15 thro

123Chapter 3: ReferenceImporting Netlist and ASCII FilesPod A2 Channel 5, and Pod A1 Channel 6. ClocksLabel1;CK[AK] Label1 maps to Slot A Clock K. “Im

124Chapter 3: ReferenceImporting Netlist and ASCII FilesTo Import an ASCII file.1. Create an ASCII file for importing into the logic analysis system.

125Chapter 3: ReferenceImporting Netlist and ASCII FilesTermination AdapterThe logic analyzer cable must have the proper RC network at its input in or

126Chapter 3: ReferenceImporting Netlist and ASCII FilesE5346A High Density AdapterThe E5346A high-density adapter provides a convenient and easy way

127Chapter 3: ReferenceImporting Netlist and ASCII FilesMapping Connector Names1. Select the Format tab. 2. Select File, then select Import Netlist.3.

128Chapter 3: ReferenceImporting Netlist and ASCII Files2. Select the file from the File Selection dialog box.3. Select OK4. Select Next Verify Net to

129Chapter 3: ReferenceImporting Netlist and ASCII FilesSelect/Create Interface LabelsSelect any additional labels to be copied into the Format tab. T

13Chapter 1: Getting StartedStep 1. Connect the logic analyzer to the device under testStep 1. Connect the logic analyzer to the device under testBefo

130Chapter 3: ReferenceImporting Netlist and ASCII FilesPod Assignment DialogName: Lets you name the analyzers.Type: Lets you select the timing (async

131Chapter 3: ReferenceImporting Netlist and ASCII FilesSampling Positions DialogThe Sampling Positions dialog lets you position the logic analyzer&ap

132Chapter 3: ReferenceImporting Netlist and ASCII FilesEye Finder Option, Setup TabFile menu Lets you save/load eye finder data.EyeFinder menu Lets y

133Chapter 3: ReferenceImporting Netlist and ASCII FilesIf a channel appears in multiple labels, selecting that channel will select it in each of thos

134Chapter 3: ReferenceImporting Netlist and ASCII FilesEye Finder Option, Results TabThe Eye Finder Results display is a digital "eye" diag

135Chapter 3: ReferenceImporting Netlist and ASCII FilesResults menu Let you expand/collapse the signals in a label, set the bus view, set the samplin

136Chapter 3: ReferenceImporting Netlist and ASCII FilesHow the Selected Position Behaves1. When eye finder is enabled, the selected position (blue li

137Chapter 3: ReferenceImporting Netlist and ASCII FilesAn eye finder measurement is currently running. Stop the eye finder or wait for it to complete

138Chapter 3: ReferenceImporting Netlist and ASCII Files"From Eye Finder: After hardware calibration, the sampling positions for the following ch

139Chapter 3: ReferenceImporting Netlist and ASCII Filesrequest or when the Sampling Positions dialog is closed or iconified."Timeout: < N K c

14Chapter 1: Getting StartedStep 2. Choose the sampling modeStep 2. Choose the sampling modeThere are two logic analyzer sampling modes to choose from

140Chapter 3: ReferenceImporting Netlist and ASCII Files2. The stable region(s) are too small for eye finder to detect.In this case you must resort to

141Chapter 3: ReferenceImporting Netlist and ASCII Filesthan 5 nsec and the clock period is greater than 10 nsec (slower than 100 MHz).Eye Finder Load

142Chapter 3: ReferenceImporting Netlist and ASCII Files"Failed to open file for reading/writing: NAME"The selected file could not be opened

143Chapter 3: ReferenceImporting Netlist and ASCII FilesFile: Name of the eye finder data file.Created: Date and time the eye finder data file was cre

144Chapter 3: ReferenceImporting Netlist and ASCII FilesManual Setup/Hold OptionWhen you select Manual Setup/Hold, the following options appear.Label

145Chapter 3: ReferenceImporting Netlist and ASCII Filesposition is after the sampling clock.See Also “To manually adjust sampling positions” on page

146Chapter 3: ReferenceThe Trigger TabThe Trigger TabThe Trigger tab is used to tell the analyzer when to capture data. The key event is the trigger.I

147Chapter 3: ReferenceThe Trigger Tab• “Save/Recall Subtab” on page 157 See Also “Understanding Logic Analyzer Triggering” on page 192“Setting Up Tri

148Chapter 3: ReferenceThe Trigger TabGeneral Timing Trigger FunctionsThe following general trigger functions are found in the Trigger Functions tab w

149Chapter 3: ReferenceThe Trigger Tab• Find 2 edges too close togetherBecomes true when the second specified edge occurs within a specified time afte

15Chapter 1: Getting StartedStep 2. Choose the sampling modeIf you chose Timing Mode1. Select the timing analyzer full/half channel configuration.Typi

150Chapter 3: ReferenceThe Trigger Tab• OR TriggerWhen the logic analyzer is armed by another instrument (as specified in the Intermodule window), thi

151Chapter 3: ReferenceThe Trigger TabThis trigger function has been replaced by the "Store range until pattern occurs" and "Store patt

152Chapter 3: ReferenceThe Trigger TabBecomes true when the specified pattern occurs in the specified number of samples consecutively.• Find pattern2

153Chapter 3: ReferenceThe Trigger Tab“To break down a trigger function” on page 67“To cross-trigger with another instrument” on page 107“To cross-tri

154Chapter 3: ReferenceThe Trigger Tabthey are specified. The logic analyzer executes the set of actions in the "then" clause associated wit

155Chapter 3: ReferenceThe Trigger TabTrigger Position Lets you specify where the sample that triggered the analyzer should appear among all the other

156Chapter 3: ReferenceThe Trigger TabDefault Storing SubtabStore by default Lets you specify that Anything, Nothing, Custom, or selected Transitions

157Chapter 3: ReferenceThe Trigger TabStatus SubtabThe Status subtab shows you the sequence level that is evaluating captured data, occurrence and glo

158Chapter 3: ReferenceThe Trigger TabYou can also save trigger sequences outside of configuration files by creating trigger function libraries.See Al

159Chapter 3: ReferenceThe Symbols TabThe Symbols TabThe Symbols tab lets you load symbol files or define your own symbols. Symbols are names for part

16Chapter 1: Getting StartedStep 2. Choose the sampling modeYou can also specify clock input signal levels (from the device under test) that will enab

160Chapter 3: ReferenceThe Symbols TabObject file versionsDuring the load process, a symbol database file with a .ns extension will be created by the

161Chapter 3: ReferenceThe Symbols TabSymbols Selector DialogSearch Pattern: Lets you enter partial symbol names and the asterisk wildcard character (

162Chapter 3: ReferenceThe Symbols TabOffset By Lets you add an offset value to the starting point of a symbol. This can be useful when compensating f

163Chapter 3: ReferenceThe Symbols Tabfunc1 and func2 are adjacent to each other in physical memory, with func2 following func1. In order to trigger o

164Chapter 3: ReferenceThe Symbols TabC++ notation. To improve performance for these ELF symbol files, type information is not associated with variabl

165Chapter 3: ReferenceThe Symbols TabThe address or address range must be a hexadecimal number. It must appear on the same line as the symbol name, a

166Chapter 3: ReferenceThe Symbols Tab[START ADDRESS]address#comment textLines without a preceding header are assumed to be symbol definitions in one

167Chapter 3: ReferenceThe Symbols TabNOTE: If you use section definitions in a GPA symbol file, any subsequent function or variable definitions must

168Chapter 3: ReferenceThe Symbols TabVARIABLESYou can specify symbols for variables using:• The address of the variable.• The address and the size of

169Chapter 3: ReferenceThe Symbols TabExample[SOURCE LINES]File: main.c10 0000100011 0000100214 0000100A22 0000101ESee Also Us

17Chapter 1: Getting StartedStep 3. Format labels for the probed signalsStep 3. Format labels for the probed signalsWhen a logic analyzer probes hundr

170Chapter 3: ReferenceError MessagesError Messages• “Analyzer armed from another module contains no "Arm in from IMB" event” on page 185• “

171Chapter 3: ReferenceError MessagesMust assign Pod 1 on the master card to specify actions for flagsWhen using a 16760A analyzer in 200Mb/s state mo

172Chapter 3: ReferenceError MessagesNOTE: For labels that do span pod pairs, the complexity can be reduced to the same as that of the non-split label

173Chapter 3: ReferenceError Messages• Cannot AND more than 16 non-split pattern events if the pattern events are all on the same pod pair.• Can AND u

174Chapter 3: ReferenceError Messages 1 If (complex event list) occurs 1 time then goto next 2 If anything occurs 1 time then Goto Next

175Chapter 3: ReferenceError MessagesSpecific Guidelines - 800 Mb/s State Mode• Labels that span pods (split labels) require more combiner resources t

176Chapter 3: ReferenceError Messagescombine 2 non-split labels that are ANDed together even though it fails to compile a pattern on a single label th

177Chapter 3: ReferenceError MessagesCounter value checked as an event, but no increment action specifiedThis warning occurs because you have used a c

178Chapter 3: ReferenceError MessagesHardware Initialization FailedPlease go to System Administration Tools and run the Self-Test Utility (see page 10

179Chapter 3: ReferenceError MessagesNo more Pattern resources available for this pod pairThis error occurs when you have used up all the pattern reso

18Chapter 1: Getting StartedStep 3. Format labels for the probed signalsTo assign pods to one or two logic analyzersA logic analyzer's pod pairs

180Chapter 3: ReferenceError MessagesSlow or Missing ClockThe message "Slow or Missing Clock" only appears in state measurements. However, i

181Chapter 3: ReferenceError MessagesResume in any action. You do not need to start the timer in the same sequence level. The timer will still functio

182Chapter 3: ReferenceError MessagesTrigger inhibited during timing prestoreThe "trigger inhibited" informational message appears when you

183Chapter 3: ReferenceError Messagesexpressions must be reduced to 16 and the complexity of some of the expressions may have to also be reduced.Branc

184Chapter 3: ReferenceError Messagesresources).• An inequality compare (<,<=,>,>=) with a split label pattern event requires 2 combiner r

185Chapter 3: ReferenceError Messagesparticularly useful when you use store qualifiers to store "no states" (or only the states you are inte

186Chapter 3: ReferenceSpecifications and CharacteristicsSpecifications and CharacteristicsNOTE: For a complete comparison of all logic analyzer speci

187Chapter 3: ReferenceSpecifications and CharacteristicsGeneral information - Channel Counts: 1-card module 64 data, 4 clock 2-card mod

188Chapter 3: ReferenceSpecifications and Characteristics For sample rates = 400 MHz: 68 x

189Chapter 3: ReferenceSpecifications and CharacteristicsWhat is a Specification?A Specification is a numeric value, or range of values, that bounds t

19Chapter 1: Getting StartedStep 3. Format labels for the probed signalsTo assign names to logic analyzer channels1. Select a label button, and either

190Chapter 3: ReferenceSpecifications and CharacteristicsWhat is a Function Test?Function tests are quick tests designed to verify basic operation of

1914Concepts• “Understanding Logic Analyzer Triggering” on page 192• “Understanding State Mode Sampling Positions” on page 208

192Chapter 4: ConceptsUnderstanding Logic Analyzer TriggeringUnderstanding Logic Analyzer TriggeringSetting up logic analyzer triggers can be difficul

193Chapter 4: ConceptsUnderstanding Logic Analyzer Triggeringplaced on the conveyor belt, and at the other end the boxes fall off. In other words, bec

194Chapter 4: ConceptsUnderstanding Logic Analyzer TriggeringSpecial box Trigger point--------------------- ------------------------

195Chapter 4: ConceptsUnderstanding Logic Analyzer Triggeringedge before it begins looking for the next rising edge. Because there is a sequence of st

196Chapter 4: ConceptsUnderstanding Logic Analyzer Triggeringtime. Two sequence levels can never be used to specify two events that happen simultaneou

197Chapter 4: ConceptsUnderstanding Logic Analyzer Triggeringanalyzer will never trigger.When the conditions are met in a sequence level, it is clear

198Chapter 4: ConceptsUnderstanding Logic Analyzer TriggeringBranchesBranches are similar to the Switch statement in the C programming language and th

199Chapter 4: ConceptsUnderstanding Logic Analyzer Triggering“not in range” function as well. Ranges are a convenient shortcut so that you don't

2 Agilent Technologies 16750A/B Logic AnalyzerThe Agilent Technologies 16750A/B 400 MHz State/2 GHz Timing Zoom logic analyzer offers 4M deep memory

20Chapter 1: Getting StartedStep 4. Define the trigger conditionStep 4. Define the trigger conditionThe trigger is the event in the device under test

200Chapter 4: ConceptsUnderstanding Logic Analyzer Triggeringbe used in place of Global Counters, if possible, because they are easier to use and beca

201Chapter 4: ConceptsUnderstanding Logic Analyzer Triggeringbecause timer1 will keep running and condition “Timer1 <500 ns” will never be met. The

202Chapter 4: ConceptsUnderstanding Logic Analyzer TriggeringADDR In Range 1000 to 2000By default, the Default Storage is set to store all samples acq

203Chapter 4: ConceptsUnderstanding Logic Analyzer Triggering1. If DATA = 005E then Trigger Else If ADDR in range 5000 to 6FFF then Store Sample

204Chapter 4: ConceptsUnderstanding Logic Analyzer TriggeringThe Agilent 16715A trigger user interfaceNote that a picture (which corresponds to the se

205Chapter 4: ConceptsUnderstanding Logic Analyzer TriggeringThe same trigger as If/Then statementsTrigger functions can be modified. For example, if

206Chapter 4: ConceptsUnderstanding Logic Analyzer Triggering“Find Edge” and “Find Pattern” togetherNext: “Setting Up Complex Triggers” on page 206Set

207Chapter 4: ConceptsUnderstanding Logic Analyzer Triggeringdifferent parts of the trigger to describe how they work.Inline documentation on an Agile

208Chapter 4: ConceptsUnderstanding State Mode Sampling PositionsUnderstanding State Mode Sampling PositionsSynchronous sampling (state mode) logic an

209Chapter 4: ConceptsUnderstanding State Mode Sampling PositionsTo position the setup/hold window (sampling position) within the data valid window, a

21Chapter 1: Getting StartedStep 5. Run the measurementStep 5. Run the measurementOnce the trigger condition has been defined, you can run the measure

210Chapter 4: ConceptsUnderstanding State Mode Sampling Positionschannel in a small fraction of the time (and without the extra test equipment) that i

211Glossaryabsolute Denotes the time period or count of states between a captured state and the trigger state. An absolute count of -10 indicates t

212 Glossarypointing device, to click an item, position the cursor over the item. Then quickly press and release the left mouse button.clock channel

213Glossaryinstrument tool. Multiple data sets can be displayed together when sourced into a single display tool. The Filter tool is used to pass on

214 GlossaryUsing the Touchscreen:Position your finger over the item, then press and hold finger to the screen. While holding the finger down, slide

215Glossarylogic analyzer what data you want to collect, such as which channels represent buses (labels) and what logic threshold your signals use.f

216 Glossaryis usually represented as decimal numbers separated by periods; for example, 192.35.12.6. Ask your LAN administrator if you need an inte

217Glossarymachine because the master card is in slot C of the mainframe. The other cards of the module are called expansion cards.menu bar The men

218 Glossaryby the channel width of the instrument.pod See pod pairpoint To point to an item, move the mouse cursor over the item, or position you

219Glossarymeasurement as part of its data acquisition cycle.Sampling Use the selections under the logic analyzer Sampling tab to tell the logic an

22Chapter 1: Getting StartedStep 6. Display the captured dataStep 6. Display the captured dataOnce you have run a measurement and filled the logic ana

220 Glossarysymbols Symbols represent patterns and ranges of values found on labeled sets of bits. Two kinds of symbols are available: • Object fil

221Glossarytiming measurement In a timing measurement, the logic analyzer samples data at regular intervals according to a clock signal internal to

222 Glossaryfield. This action allows you to select specific portions of a particular waveform in acquisition memory that will be displayed on the s

223Symbols&, 78*, bit assignment, 59+, label polarity, 61-, label polarity, 61., bit unassignment, 59Numerics1.25 ns sample rate, 4116750A/B 400

224 Indexclock channels, inputs available as data, 119clock qualifier, 14clock qualifiers, characteristic, 186clock setup, 14clock setup area, 117clo

Index 225errors in data, 92evaluation order, 83event evaluation order, 83event list, naming, 84events, 20, 78events, counter, 80events, flag, 81, 149

226 Indexin symbol browser, 162increment counter, 80information, for more, 24input capacitance, probe, characteristic, 186input resistance, probe, ch

Index 227patterns, 66pause timer, 79performance verification, 108period, sample, 42pod assignment dialog, 57pod clocking, demultiplex, 44pod pairs, a

228 Indexskew, channel-to-channel, characteristic, 186slave clocks for pods, 44slow clock message, 180SMTP, 76soft shutdown option, 53source line num

Index 229timing trigger functions, 147timing trigger functions, general, 148Timing Zoom data, 89timing, memory depth, 41transitional timing, 37transi

23Chapter 1: Getting StartedStep 6. Display the captured data3. Drag the display tool icon and drop it on the analyzer icon.4. To open the display too

230 Index

Publication Number: 5988-9040ENs1January 1, 2003

24Chapter 1: Getting StartedFor More Information...For More Information...On making measurements on the demo counter board:• “Example: Timing measurem

25Chapter 1: Getting StartedFor More Information...help volume)• Using the Compare Analysis Tool (see the Compare Tool help volume)

26Chapter 1: Getting StartedExample: Timing measurement on counter boardExample: Timing measurement on counter boardThis example uses the demo counter

27Chapter 1: Getting StartedExample: Timing measurement on counter boardTo run the measurement1. Select the Run Single button.To display the captured

28Chapter 1: Getting StartedExample: State measurement on counter boardExample: State measurement on counter boardThis example uses the demo counter b

29Chapter 1: Getting StartedExample: State measurement on counter boardTo run the measurement1. Select the Run Single button.To display the captured d

3Agilent Technologies 16750A/B Logic Analyzer• “Running Measurements” on page 86 • “Displaying Captured Data” on page 88• “Using Symbols” on page 95

30Chapter 1: Getting StartedExample: State measurement on counter board

312Task Guide• “Probing the Device Under Test” on page 33• “Choosing the Sampling Mode” on page 36• “Selecting the Timing Mode (Asynchronous Sampling)

32Chapter 2: Task Guide• “Selecting the State Mode (Synchronous Sampling)” on page 43• “In Either Timing Mode or State Mode” on page 52• “Using 2 GHz

33Chapter 2: Task GuideProbing the Device Under TestProbing the Device Under TestThe figures below shows a variety of simple probing connections. The

34Chapter 2: Task GuideProbing the Device Under TestAdapter-to-Board ConnectionBoth the 01650-63203 and the E5346A adapters include termination for th

35Chapter 2: Task GuideProbing the Device Under Testcorrectly, and may include an inverse assembler. The circuit board provides access to logical grou

36Chapter 2: Task GuideChoosing the Sampling ModeChoosing the Sampling ModeThere are two logic analyzer sampling modes to choose from: timing mode and

37Chapter 2: Task GuideTo select transitional timing or store qualifiedTo select transitional timing or store qualified1. In the Sampling tab with Tim

38Chapter 2: Task GuideTo select transitional timing or store qualifiedMore on Store Qualification in Transitional TimingWhen Transitions is selected

39Chapter 2: Task GuideTo select transitional timing or store qualifiedhappen at this rate, two samples are stored (four at the fastest rate of 2.5 ns

4 Agilent Technologies 16750A/B Logic Analyzer

40Chapter 2: Task GuideTo select transitional timing or store qualifiedSequence level branchingIn transitional timing, only 2 branches are available p

41Chapter 2: Task GuideTo select transitional timing or store qualified2. Select the Sampling tab.3. Choose the Timing Mode option.You can also select

42Chapter 2: Task GuideTo select transitional timing or store qualifiedNOTE: When the Sample Period is 1.25 ns, data is acquired at four times the tri

43Chapter 2: Task GuideTo select transitional timing or store qualifiedSelecting the State Mode (Synchronous Sampling)In state mode, the logic analyze

44Chapter 2: Task GuideTo select transitional timing or store qualifiedTo select the state mode1. Open the logic analyzer Setup window.2. Select the S

45Chapter 2: Task GuideTo select transitional timing or store qualifiedsaved into one sample of logic analyzer memory.Two additional sampling clock mo

46Chapter 2: Task GuideTo select transitional timing or store qualifiedTo set up the master/slave sampling clock mode1. In the Sampling tab, with Stat

47Chapter 2: Task GuideTo select transitional timing or store qualifiedSee Also “To change the sampling clock mode” on page 44 To automatically adjust

48Chapter 2: Task GuideTo select transitional timing or store qualifiedThe Use demo data (no probes required) option is for demonstration purposes onl

49Chapter 2: Task GuideTo select transitional timing or store qualifiedTo view eye finder data as a bus compositeWhen you want a compressed, high-leve

5ContentsAgilent Technologies 16750A/B Logic Analyzer1 Getting StartedStep 1. Connect the logic analyzer to the device under test 13Step 2. Choose t

50Chapter 2: Task GuideTo select transitional timing or store qualified2. In the file browser dialog, name the file to be saved or select the file to

51Chapter 2: Task GuideTo select transitional timing or store qualifiedsetup time is the front edge of the setup/hold window relative to the sampling

52Chapter 2: Task GuideTo select transitional timing or store qualified(The actual sampling position is in the middle of the setup/hold window.)See Al

53Chapter 2: Task GuideTo select transitional timing or store qualifiednot look for a trigger until the specified percentage of pretrigger data has be

54Chapter 2: Task GuideTo select transitional timing or store qualified2. In the Analyzer Shutdown Options dialog, choose either:• Soft -- This will l

55Chapter 2: Task GuideTo select transitional timing or store qualified1. In the Sampling tab, select the Timing Zoom button.2. In the Timing Zoom con

56Chapter 2: Task GuideTo select transitional timing or store qualifiedTo specify which analyzer has Timing ZoomNOTE: If you have both analyzers of th

57Chapter 2: Task GuideFormatting Labels for Logic Analyzer ProbesFormatting Labels for Logic Analyzer ProbesThe Format tab is mainly for assigning bu

58Chapter 2: Task GuideFormatting Labels for Logic Analyzer ProbesWhen using a multi-card logic analyzer:• When both analyzers are turned on, pods 1/2

59Chapter 2: Task GuideFormatting Labels for Logic Analyzer Probes• LVCMOS 1.5v -- The threshold level is +0.75 volts.• LVCMOS 1.8v -- The threshold l

6 ContentsTo select transitional timing or store qualified 37More on Store Qualification in Transitional Timing 38More on Storing Transitions 38Trans

60Chapter 2: Task GuideFormatting Labels for Logic Analyzer Probes• Or, choose the Insert before or Insert after command, enter the label name, and se

61Chapter 2: Task GuideFormatting Labels for Logic Analyzer Probes“To turn labels off or on” on page 62“To change the label polarity” on page 61 To ch

62Chapter 2: Task GuideFormatting Labels for Logic Analyzer Probes3. In the Change Bit Order dialog:• To reorder the bits individually, enter the bit

63Chapter 2: Task GuideFormatting Labels for Logic Analyzer ProbesThe label's data appears in the display windows.

64Chapter 2: Task GuideSetting Up Triggers and Running MeasurementsSetting Up Triggers and Running MeasurementsThe following information is a generic

65Chapter 2: Task GuideSetting Up Triggers and Running Measurementssequence levels, the question about what to do with the captured data samples.Of co

66Chapter 2: Task GuideSetting Up Triggers and Running Measurementsand options.To specify a label pattern eventLabel pattern events let you specify pa

67Chapter 2: Task GuideSetting Up Triggers and Running Measurementsedge events are only available in certain timing mode trigger functions.1. Select t

68Chapter 2: Task GuideSetting Up Triggers and Running MeasurementsTo expand a trigger function1. In the Trigger tab, select the number button of the

69Chapter 2: Task GuideSetting Up Triggers and Running Measurements• Insert and break down trigger functions from the loaded library just like normal

Contents 7Using Symbols 95To load object file symbols 96To adjust symbol values for relocated code 97To create user-defined symbols 98To enter symbol

70Chapter 2: Task GuideSetting Up Triggers and Running MeasurementsUsing State Mode Trigger FeaturesWhen the logic analyzer sampling mode is state, yo

71Chapter 2: Task GuideSetting Up Triggers and Running MeasurementsTo Specify Default StoringYou can set up default storing so that only the data samp

72Chapter 2: Task GuideSetting Up Triggers and Running Measurements"Branches taken" feature of past logic analyzers. The best way to store o

73Chapter 2: Task GuideSetting Up Triggers and Running Measurementsthat follow one another, you need to use multiple levels in the trigger sequence.Fo

74Chapter 2: Task GuideSetting Up Triggers and Running Measurementsinsert.A picture describing the trigger function is shown.3. Select the Replace but

75Chapter 2: Task GuideSetting Up Triggers and Running Measurementstrigger action you want to specify.A yellow box appears around the level.2. Select

76Chapter 2: Task GuideSetting Up Triggers and Running Measurements4. In the E-mail Setup dialog, enter the name of the SMTP (see page 76) mail server

77Chapter 2: Task GuideSetting Up Triggers and Running Measurementsthe protocol.On the Internet, there are the following TCP/IP protocols:• TCP (Trans

78Chapter 2: Task GuideSetting Up Triggers and Running MeasurementsEditing Advanced Trigger FunctionsAfter you break down a trigger function (if it di

79Chapter 2: Task GuideSetting Up Triggers and Running Measurements2. Enter a time duration value.The event must be present for the specified period o

8 ContentsImporting Netlist and ASCII Files 121Exporting ASCII Files 123Importing ASCII Files 123Termination Adapter 125E5346A High Density Adapter 1

80Chapter 2: Task GuideSetting Up Triggers and Running Measurementszero), stop (and reset), pause, or resume a timer. You can insert timer events in a

81Chapter 2: Task GuideSetting Up Triggers and Running Measurementsand choose either Reset or Increment.To insert a counter eventCounter events are li

82Chapter 2: Task GuideSetting Up Triggers and Running MeasurementsFlags can also be used to drive the logic analysis system's Port Out signal.To

83Chapter 2: Task GuideSetting Up Triggers and Running Measurementschoose to insert or replace a Flag.2. Select the flag number button and choose the

84Chapter 2: Task GuideSetting Up Triggers and Running Measurementsevent list, you can specify their evaluation order by grouping the events.1. In the

85Chapter 2: Task GuideSetting Up Triggers and Running MeasurementsSaving/Recalling Trigger SetupsYou can save a trigger setup within a session by usi

86Chapter 2: Task GuideSetting Up Triggers and Running MeasurementsRunning MeasurementsAfter you set up a trigger, you're ready to run the logic

87Chapter 2: Task GuideSetting Up Triggers and Running Measurementslogic analyzer is still running.• Messages such as "Waiting in level 1" m

88Chapter 2: Task GuideDisplaying Captured DataDisplaying Captured DataOnce you have run a measurement and filled the logic analyzer's acquisitio

89Chapter 2: Task GuideDisplaying Captured DataWaveform and Listing (and other) display tools provide global markers that can be used to correlate dat

Contents 9Error Messages 170Must assign Pod 1 on the master card to specify actions for flags 171Branch expression is too complex 171Cannot specify r

90Chapter 2: Task GuideDisplaying Captured Data• In Waveform displays, Timing Zoom and the regular data are in different windows. To view them togethe

91Chapter 2: Task GuideDisplaying Captured Datatime. For example, if you use storage qualification (in the state sampling mode) or the Pattern Filter

92Chapter 2: Task GuideDisplaying Captured DataIf the captured data doesn't look correctIntermittent Data ErrorsCheck for poor connections, incor

93Chapter 2: Task GuideDisplaying Captured DataSince acquisition memory is cleared at the beginning of a measurement, stopping a run may create a disc

94Chapter 2: Task GuideDisplaying Captured Data• Select the OK button. The symbolic names for the values now appear in the overlaid bus waveform.To vi

95Chapter 2: Task GuideUsing SymbolsUsing SymbolsYou can use symbol names in place of data values when:• Setting up triggers• Displaying captured data

96Chapter 2: Task GuideUsing SymbolsTo load object file symbolsObject files are created by your compiler/linker or other software development tools.1.

97Chapter 2: Task GuideUsing Symbolsthe object file symbols are reloaded.To delete object file symbol files1. Select the Symbol tab, and then the Obje

98Chapter 2: Task GuideUsing Symbolswhose symbols you wish to relocate.3. Select the Relocate Sections... button.4. Enter the desired offset in the Of

99Chapter 2: Task GuideUsing SymbolsTo delete user-defined symbols1. Under the Symbol tab, select the User Defined tab.2. Select the label you want to