Agilent Technologies 4294A Specifications Page 20

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The measurement circuit is functionally divided into following three sections.
The signal source section generates the test signal applied to the unknown device. The frequency of
the test signal (fm) is variable from 40 Hz to 110 MHz, and the maximum frequency resolution is 1
mHz. A microprocessor controlled frequency synthesizer is employed to generate these high-resolu-
tion test signals. The output signal level, variable from 5 mV to 1 V, is adjusted using an attenuator.
Figure 2-3 shows a diagram of the signal source section. In addition to generating the test signal
which is fed to the DUT, the internally used reference signals are also generated in this section.
The auto balancing bridge section balances the range resistor current with the DUT current to maintain
a zero potential at the low terminal. Figure 2-4 (a) shows a simplified block diagram of the bridge
section. The detector D detects potential at the low terminal and controls both magnitude and
phase of the OSC2 output, so that the detected potential becomes zero. The actual balancing opera-
tion is shown in Figure 2-4 (b). When the bridge is “unbalanced”, the null detector detects an error
current and the phase detectors, at the next stage, separate it into 0° and 90° vector components.
The output signals of the phase detectors go through loop filters (integrators) and are applied to the
modulator to drive the 0° and 90° component signals. The resultant signal is amplified and fed back
through range resistor Rr to cancel the current through the DUT, therefore no error current flows
into the null detector. This balancing operation is performed automatically over the full frequency
range of 40 Hz to 110 MHz.
The vector ratio detector section measures two vector voltages across the DUT (Edut) and range resis-
tor Rr (Err) series circuit (Figure 2-5). Since the range resistor value is known, measuring two volt-
ages will give the impedance vector Zx of the DUT by Zx = Rr × (Edut/Err). Selector S1 selects either
the Edut or Err signal so that these signals alternately flow identical paths to eliminate tracking
errors between the two signals. Each vector voltage is measured using an A to D converter and sep-
arated into its 0° and 90° components by digital processing.
Figure 2-3. Signal source section block diagram
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