Agilent Technologies 4294A Specifications Page 88

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5-5. MOS FET measurement
Evaluating the capacitances between the source, drain, and gate of an MOS FET is important in
design of high frequency and switching circuits. Generally, these capacitances are measured while a
variable DC voltage source is connected to the drain terminal referenced to the source, and the gate
held at zero DC potential (Figure 5-24). When an instrument is equipped with a guard terminal and
an internal DC bias source, capacitances Cds, Cgd, and Cgs can be measured individually. Figure 5-
25 (a) through (c) shows the connection diagram for an instrument’s High, Low, and Guard termi-
nals. The guard is the outer conductors of BNC connectors of the UNKNOWN terminals.
Figure 5-24. Capacitance of MOS FET
Figure 5-25. MOS capacitance measurement
5-14
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